- Introduction
- Conventional CMOS
- Key Components and Parameters
- Process Overview and Integration Issues
- Scaling and Limitations
- Mobility Enhancement Techniques
- Strained Silicon
- Crystal Orientation
- Gate Stacks, High-k Dielectrics
- Gate Conductor Materials and Properties
- High-k Materials and Properties
- Gate Stack Integration
- Options for Source-Drain, Extensions
- Elevated Source / Drain
- Co-Implantation of Inactive Species
- Schottky-Barrier Source-Drain
- Three-Dimensional Structures
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- FinFETs, Multi-Gates
- Interconnects
- Aluminum Interconnects, Issues
- Copper Interconnects, Issues
- Low-k Dielectrics
- CMOS Reliability Considerations
- Electrostatic Discharge
- Electromigration and Stress Migration
- Soft Errors, Plasma Damage
- Dielectric Reliability
- Bias Temperature Instabilities
- Hot Carrier Reliability
- Burn-In
- Yield Considerations
- Yield Detractors
- Models
- Monitors
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