Digital Fundamental Concepts of ESD Design
- Concepts of ESD Design
- Device Response to External Events
- Alternate Current Loops
- Switches
- Decoupling of Current Paths
- Decoupling of Feedback Loops
- Decoupling of Power Rails
- Local and Global Distribution
- Usage of Parasitic Elements
- Buffering, Ballasting
- Unused Sections of a Semiconductor Device
- Circuit or Chip Function: Impedance Matching between Floating and Non-Floating Networks
- Unconnected Structures
- Utilization of “Dummy Structures and Dummy Circuits"
RF ESD Design
- What Makes RF ESD Design Unique?
- RF ESD Design Fundamentals
- Frequency Separation between ESD and RF phenomenon
- RF ESD Co-synthesis
- Impedance Isolation
- Cancellation Methodology
- Use of Inductors
- Use of Capacitors
- Matching and ESD Integration
- Smith Chart and ESD
- RF ESD metrics
- Capacitors and ESD
- Inductors and ESD
- Biasing of RF Circuits
- Stability and ESD
- Emitter Degeneration with Resistive Elements
- Emitter Degeneration with Inductors
RF ESD Degradation and Testing Techniques
- ESD RF test techniques
- S-parameter Degradation
- Impedence degradation Techniques
- Time Domain Reflection (TDR) ESD techniques
- Unity current gain cutoff frequency – collector current Degradation
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- d.c. versus RF Parameters
- Insitu versus non-insitu RF ESD testing techniques
- Eye Test ESD degradation
RF ESD Devices
- Choosing the Best ESD network for the RF Circuit and Application
RF ESD Design Techniques
- Method of Lumped versus Distributed ESD load
- Method of Capacitance Transfer to ESD load
- Method of ESD Cancellation
- Method of Impedance Isolation
- Method LC Isolation
RF ESD Design Integration and Design Synthesis
- Analog, Digital and RF Domain Integration
- Active Noise Suppression Networks and ESD
- RF Pads, and ESD Integration
RF CMOS Technology
- RF CMOS Passive elements
- Inductors
- Capacitors
- MIM Capacitors
- M-ILD-M Capacitors
- Vertical Parallel Plate Capacitors
- RF CMOS Active elements
- RF ESD Circuits
- RF CMOS ESD Input Circuits
- Inductor/Diode Design
- Diode/Inductor Design
- RF CMOS Power Clamps
RF BiCMOS Silicon Germanium Technology
- RF Passive / Active elements
- RF Silicon Germanium ESD Circuits
RF BiCMOS Silicon Germanium Carbon Technology
- RF SiGeC ESD Results
- RF SiGeC ESD Circuits
- RF SiGeC ESD Power Clamps
RF Gallium Arsenide Technology
- RF Passive / Active elements
- RF GaAs ESD Circuits
RF Receivers
- Bipolar Transistor Receivers
- Single Ended Receiver Circuits
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- Single Ended Receivers Circuits with Resistive Feedback
- Single Ended Cascode Circuits
- Single Ended Cascode with Balun Output
- Differential Receiver Circuits
- RF CMOS Transistor Receivers
- Single Ended, Differential, Receivers and ESD solutions
Analog and RF Design and Circuits
- Low Noise Amplifiers (LNA)
- ESD and LNA Design
- Power Amplifiers (PA)
RF ESD Power Clamps
- ESD Power Clamps: Bipolar-Based: Si, Silicon Germanium, and Gallium Arsenide
- Bipolar ESD Power Clamp: Voltage-Triggered ESD Power Clamps
- Bipolar ESD Power Clamp: Zener Breakdown Voltage-Triggered
- Bipolar ESD Power Clamp: BVCEO Voltage-Triggered ESD Power Clamps
- Bipolar ESD Power Clamp: Mixed-Voltage, Interface Forward-Bias Voltage
- Ultra Low-Voltage Forward-Biased Voltage-Trigger
- Capacitively-Triggered
- Silicon Controlled Rectifier-based
RF ESD Computer Aided Design Methodology
- ESD Library Methodology
- Parameterized Cells
- Hierarchical Parameterized Cells
- Advantages of the RF ESD CAD Methodology
- Test Site
- Testing
- Checking and Verification
- Release Process
- Guard Rings
- Theory and Characterization
- Design
Off-Chip Protection Concepts
- Spark Gaps
- Field Emission Devices
- Transient Voltage Suppression Devices
- Polymer Voltage Suppression Devices
- Proximity Communication Techniques
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