- Advanced High Speed Concepts
- Impedance of structures to both clock rate harmonics and edge rate harmonics
- Resonance on Transmission Lines: Serial and Parallel resonance. Quarter wave length differences of high and low end impedance termination.
- Near field and far field definitions and their effects on the magnetic and electric field strengths
- The quality factor for lumped circuitry: Why they can ring, crosstalk and cause EMI radiation
- Transmission Lines (TL)
- The TL Cell-Defining, Rdc, Rac, Skin Effect, Proximity, and the Dielectric Loss
- Current Travel on TLs: Converting the B field to eddy currents and how it creates the skin effect and proximity effect
- Characteristics of PCB Material: What material is used for high frequency: DF, Cost, DFM, DFA
- Performance Regions
- The basic RLGC cell and its effect on rising and falling edges
- The Lumped Element region-parameters and model
- Practical applications of the lumped model
- The RC Region of the lumped model. Input/characteristic/Output impedance. Propagation velocity, Elmore’s delay and lumped model algorithm
- The Constant Loss Region: Boundary Conditions, propagation coefficient, resonance, termination considerations
- The Skin Effect Region: Boundary Conditions, characteristic impedance, propagation delay parameters, termination options, speed and distance
- Dielectric Region: Boundary Conditions, characteristic impedance, dielectric loss/tangent loss, propagation delay, resonance, termination
- The Printed Circuit Board (PCB)
- Modeling PCB Traces
- Skin Effect and Dielectric Loss for PCB Traces: microstrip and stripline
- Dielectric Properties, relative costs and core/prepreg issues for high speed stackups
- Effects of temperature, frequency and mfg tolerance on characteristic impedance
- Solder Mask and Conformal Coating: effects on Z0, propagation delay and impedance equations
- Matching Capacitive and inductive loads using trace width modification
- Far end and Near end Crosstalk: Inductive and capacitive for microstrips and striplines
- Matching traces to connectors: Minimizing reflections, crosstalk and EMI
- Vias: C and L of vias (through hole, blind, buried), via discontinuities and eliminating reflections of vias
- AC Biasing for End Terminators, where should it be used and how to choose the capacitor
- Hairball networks, bifurcated lines and capacitive stubs
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- Terminating differentials - Eliminating common mode and minimizing power
- What causes differentials unbalance?
- Diode and active terminators, Resistor Selection and Crosstalk in Terminators
- Capacitance & Inductance of Vias
- Return Current and Its Relation to Vias
- Through Hole, Blind, Buried, Micro Vias
- Intelligent Vias and autorouters
- Via discontinuity and via resonance concerns
- Advanced Topics in Bypassing
- Shoot through current and die capacitance
- Eliminating mode conversion
- Why the 0201, the long electrode and the Y cap may be essential to control switching impedance and EMI radiation
- Breakout and bypassing the 4, 5, 6 perimeter ring and fully populated BGA
- Do copperfills (pours) really help in bypassing?
- What is the present status of innerplane C materials (FR4, ceramic filled, and polymide) and how thin can they practically be made?
- How much C is needed and layout considerations for today’s FPGAs and micros?
- Return current and intelligent via placement
- Differential Signaling
- Attributes/drawbacks of loosely/tightly coupled differential pairs
- Definition and examples of differential and common mode V and I
- Differential impedance: Odd and even modes
- Advantages and disadvantages of Edge (side by side), Broadside (dual), asymmetric, and microstrip differentials
- Reflections and crosstalk in differentials. Metastability, Clk skew, driver skew, bit pattern sensitivity, ISI, skin effect and dielectric constant. Jitter, BER, and the eye diagram
- Matching electrical lengths
- High Speed Clocking
- Clock skew and jitter
- PLLs, DDLs, serpentine traces and programmable delays
- Source and end termination considerations for star, daisy chain and driving multiple loads
- Clock driving high speed buses: RAMbus and address drivers, minimizing the C load.
- Random and deterministic jitter. Power Supply noise and Clk jitter
- High Speed Data Transmission
- Pre-emphasis and equalization Techniques
- The effects of ISI, Skin and dielectric losses
- The effect of various base materials of long haul transmission. The effects of eye closure on BER
- A real world example of compensation techniques
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