Lead Free Wafer-Level Packaging (WLP) for 3D SiP (System-in-Packages) and Printed Circuit Board Assemblies
Recently, packages such as WLP (wafer level package), 3D IC integration, TSV (through silicon via),
C2W (chip-to-wafer) and W2W (wafer-to-wafer) LTB (low-temperature bonding), and EWLP (embedded wafer level package) have been very popular and
potential applications for consumer, computer, and communication products. Most of these packages use solders as their interconnects and are affected
by the lead-free regulations!
In this course, some critical issues of lead-free soldering will be presented. Also, some critical issues and their solutions of solder bumped flip-chip
WLP will be discussed. Furthermore, conductive adhesives for flip-chip WLP applications are presented. Finally, enabling technologies such as TSV
(through silicon via), LTB (low-temperature bonding), solder microbumps & their assembly and reliability, wafer thinning & thin-wafer handling,
and thermal management for 3D IC integration and packaging are examined.
HOW YOU WILL BENEFIT: |
- Understand all important aspects of 3D IC integration and WLP
- Understand the impact of TSV on 3D IC Integration and WLP
- Know the 5 key process steps of TSV
- Understand the impacts of TSV interposers on thermal and mechanical performance
- Know how to fabricate and characterize lead-free solder microbumps
- Know how to assemble lead-free solder microbumps and their reliability
- Know how to measure the strength of thin chips
- Know how to do wafer thinning and thin-wafer handling
- Know how to do low-temperature bonding for C2W and W2W stacking
- Know how to do thermal management of 3D IC stacking
- Integrating 3D IC integration and WLP into your SMT assembly process
- Understand important aspects of EWLP
- Understand all important aspects and critical issues of lead-free soldering
- Have a head-start of lead-free soldering for your green products
- Know how to do reliability testing and data analysis of your WLP assemblies
- Avoid potential reliability problems due to lead-free soldering of your products
- Understand all important aspects of WLP with conductive adhesives
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COURSE COVERS: |
- IC Trends and Their Packaging Technology Update
- Lead-Free Components, PCB, and Soldering
- Lead-Free Solders and their Material Properties
- Lead-Free PCB
- Lead-Free Components
- Lead-Free Solder-Joint Reliability Tests and Data Analysis
- Flip-Chip WLP Technologies with (Tin-Lead and Lead-Free) Solders
- Solder Bumps
- Wafer Bumping Methods
- Solder-bumped Flip Chip on PCB/Substrate Assembly Process
- Underfill Encapsulants
- Isothermal Fatigue of Lead-Free Flip-Chip WLCSP Assemblies
- Solder Joint Reliability of Flip-Chip WLCSP Assemblies
- Flip-Chip WLP Technologies with Conductive Adhesives (Lead-Free)
- Conductive Adhesives – ACA, ACF, etc.
- Au, Cu, NiAu, and Au-stud Bumps
- Materials, Process, and Reliability of WLCSP on PCB with ACF
- Au-Stud Bumped WLCSP with ACF on PCB
- Au-Stud Bumped WLCSP Diffused on Au-Plated PCB and Flex
- Reliability of Solderless Flip-Chip Assemblies
- 3D IC Integration (More Than Moore) and WLP
- Moore’s Law (2D)
- SiP
- TSV for Interposers
- TSV for Stacked chips
- TSV Etching or Laser Drilling
- TSV Dielectric Deposition
- TSV Barrier/Seed Metal Plating
- TSV Filling, e.g., Cu
- TSV Cu Polishing
- Via First TSV
- Via Last TSV
- Thin Wafer Handling
- Low-Temperature Bonding (LTB)
- W2W LTB
- C2W LTB
- Solder Microbumpings and Assembly
- Thermal Management of 3D Stacked Chips
- EWLP
- Open Discussions
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WHO SHOULD ATTEND? |
Recommended for:
- Packaging
- Design
- Material
- Process
- Equipment
- Reliability
- Quality Control
- Manufacturing
- Marketing
- R&D Engineers and Managers
- If you are involved with any aspect of the electronics industry, you should attend this course.
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"We Exceed Your Expectations!"
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