Flip Chip packaging ( 2 days)

This 2 day course provides an overview of Flip Chip Packaging.

Topics:

​History of Flip Chip

​

• Advantages of Flip Chip and comparison to alternative packaging options
  
• Types of Flip Chip and their advantages & disadvantages
  

• Solder bump
  
• Copper pillar bump
  
• Gold bump
  
• Stud bump & other
  

Bonding mechanisms and resulting joints

• Solder reflow (mass)
  
• Solder reflow (thermode)
  
• Thermocompression
  
• TCNCP (Thermo-Compression, Non-Conductive Paste)
  
• Conductive paste
  
• Bond hierarchy in multi-chip packages
  
• Other
  

Substrates for Flip Chip bonding

• Ceramic
  
• Laminate
  
• Leadframe
  
• Bond pad designs
  

• SMD
  
• NSMD
  
• Plated up
  
• Other
  

Design rules for Flip Chip

Chip

• I/O cell placement vs packaging requirements
  
• Substrate / package
  
• Cost implications
  
• DFT
  
• DFR
  

Manufacturing – process, materials, equipment

• Wafer prep including RDL
  
• Bumping process including UBM
  
• Evaporation, sputtering, plating, photolithography…
  
• Flip Chip assembly & process flow
  
• Underfill – including capillary, no-flow and other
  
• Equipment
  
• OSAT Flip Chip options
  
• Flip Chip Quality Control
  

Process control
Inspection
Equipment and metrology

Flip Chip Reliability

• TCE mismatch and DNP
  
• Role of underfill
  
• Reliability tests (T/C, drop, bend, high temperature bias, other)
  
• Electromigration of solder vs. copper pillar bump
  

Flip Chip thermal enhancement

• Modeling
  

Flip Chip electrical performance

• Versus wirebonding
  
• High speed issues
  
• Modeling
  

Flip Chip Application Examples

• High End / High Speed
  
• High Leadcount
  
• Mobile
  
• Analog / RF
  
• Flip Chip on chip
  
• Other
  

Flip Chip-Like Application Examples

• Stacked chip TSV microbumps
  
• TAB
  
• Display drivers
  
• 2.5D / interposers / EMIB
  

Flip Chip versus other packaging options

• Wirebond leadframe packaging
  
• Wirebond laminate packaging
  
• FOWLP / FOPLP
  
• SiP