Participants learn basic but powerful aspects about the mixed-signal semiconductor and electronics testing. This 3 day skill-building series is divided into four segments:
Test Phases and Economics. Participants learn the fundamentals of characterization and diagnosis. They learn the assumptions behind wafer sort and final production test. They also learn about test hardware development time, and test time and accuracy.
Direct and Indirect Testing. Participants learn the fundamentals of analog and specification measurements. They learn techniques for test time reduction. They also learn the fundamentals of alternate test techniques and test based on current signatures.
Defect-Oriented Test. Participants learn about fault models, inductive fault analysis, fault simulation and generation of tests based on these concepts.
On-Chip/On-Board Signal Generation. Participants learn how sigma-delta modulators, mixers and passive components can be used to create signals and sense signals on-board or on-chip. They also learn how to implement these techniques and perform a cost benefit analysis.
The seminar will provide participants with an in-depth understanding of mixed-signal semiconductor and electronics testing and its technical issues.
Participants will understand the basic concepts of test economics, yield, test time, and the cost of test.
The seminar will identify the key issues related to developing mixed-signal test programs for a wide variety of components.
The seminar offers the opportunity to discuss specific test problems with our expert instructor.
Participants will be able to identify basic and advanced principles for defect-oriented test.
Participants will understand how on-chip signals can be generated and evaluated for mixed-signal components, printed circuit boards, and electronic systems.
Participants will become familiar with the IEEE 1149.4 standard for mixed-signal boundary scan testing.
The seminar will introduce fundamental and advanced concepts related to radio frequency (rf) testing.
Final production test
Test development time, test application time
Test accuracy and failure and yield coverage
Analog specification measurements
Traditional specification measurements
New techniques for specification computation
Test time reduction
Set-cover based techniques
Indirect test techniques
Designing and evaluating alternate tests
Alternate test under defect scenarios
Testing based on current signatures
Increasing coverage of IDDQ testing
Vdd-ramp based testing
Inductive fault analysis
On-chip/on-board signal generation
Using delta-sigma modulators for signal generation
Using up/down conversion mixers and passive components
Impact of test board quality on test metrics
De-embedding linear and non-linear parameters
IEEE 1149.4 standard
Who Should Attend:
Test, Product and Applications Engineers, Engineering Managers and Sales Engineers have all benefited from this course – it is the logical follow-on to Soft Test’s Digital Test Technology class. In addition, Design, Verification, and DFT Engineers find these courses to be a valuable resource for bettering their understanding of the IC test process.
Next Schedule Date and Location:
Only offer at client's site
Price:$18,900 USD for up to 14 students