Advanced Packaging (Chiplets, WLP, Flip Chip, 3D Stacking)

Course Overview

This 1-day course addresses IC packaging, assembly, and package/substrate interconnections. It stresses the impact of the IC and end product requirements, i.e., "smaller, better, cheaper" their influence on the manufacturing processes. Topics include area packaging- ball grid arrays, flip chip, fanout, stacking die and chip scale packages, and the assembly technologies – chip & wire, tape automated bonding, and flip chip, as is emerging technologies namely, 3-D and stacked die, and packaging reliability issues. This course is suitable for anyone seeking a better understanding of the assembly and packaging of semiconductor devices.

Learning Objectives

Who Should Attend

Engineers, technicians, and professionals in the semiconductor industry who need comprehensive training in this specialized area. This course is designed for both newcomers and experienced professionals seeking to enhance their knowledge and skills.

Prerequisites

Basic understanding of semiconductor principles and manufacturing processes is recommended. Specific prerequisites may vary depending on the course complexity.