PTI technical training
Process Integration & Node Scaling for Advanced Nodes
Explore process integration and scaling for advanced semiconductor nodes. Review PTI's course outline and discuss technical training for your team.
Course Overview
This course provides a comprehensive overview of semiconductor process integration across advanced technology nodes. Attendees will learn how front-end-of-line (FEOL), middle-of-line (MOL), and back-end-of-line (BEOL) processes interact and influence device performance. The course emphasizes scaling challenges, process interactions, and defect mitigation strategies.
Learning Objectives
- Understand the full process flow from wafer start to device completion
- Analyze interactions between FEOL, MOL, and BEOL processes
- Identify integration challenges in advanced nodes (7nm → 2nm)
- Evaluate trade-offs in process sequence, materials, and device architecture
- Develop strategies to reduce integration defects and improve yield
Who Should Attend
Process engineers, integration engineers, device engineers, R&D engineers, and fab managers involved in advanced node production.
Prerequisites
A foundational understanding of semiconductor manufacturing processes is recommended.