Definition
Reliability degradation in MOS devices under sustained negative gate bias at elevated temperature, commonly observed in p-channel devices as threshold-voltage and performance shift associated with oxide/interface defect generation.
Application
Used in transistor reliability qualification and lifetime modeling to quantify bias-temperature-induced parameter drift in scaled CMOS technologies.
Related search terms
negative BTI
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Related concepts
Evidence and further reading
- Evidence from research.ibm.comhttps://research.ibm.com/publications/negative-bias-temperature-instabilities-in-metal-oxide-silicon-devices-with-sio-lessinfgreater2lessinfgreater-and-sio-lessinfgreaterxlessinfgreatern-lessinfgreaterylessinfgreaterhfo-lessinfgreater2lessinfgreater-gate-dielectrics
- Evidence from research.ibm.comhttps://research.ibm.com/publications/a-precise-negative-bias-temperature-instability-sensor-using-slew-rate-monitor-circuitry