Definition
A patterning step that locally removes or terminates a previously formed gate line so neighboring transistor gates are electrically separated according to the circuit layout.
Application
Used in advanced logic patterning to define discrete gate segments after line formation, with cut placement and overlay contributing directly to scaling and yield.
Related search terms
Gate Cut
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Related concepts
Evidence and further reading
- Evidence from patents.google.comhttps://patents.google.com/patent/US11791217B2/en
- Evidence from trea.comhttps://trea.com/information/gate-cut-with-high-selectivity-to-preserve-interlevel-dielectric-layer/patentgrant/d9d1bdce-72f9-438c-85f4-f6e6e79ccbe4