Definition
The electrically insulating layer between a FET gate electrode and semiconductor channel; its capacitance and leakage strongly influence electrostatic control, switching, and reliability.
Application
Used in MOSFET gate stacks, where SiO2 or high-k materials provide gate-to-channel insulation while enabling strong capacitive coupling.
Related search terms
Gate Dielectric
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Related concepts
Evidence and further reading
- Evidence from intel.comhttps://www.intel.com/pressroom/archive/releases/2001/20011126tech.htm
- Evidence from intel.comhttps://www.intel.com/pressroom/kits/advancedtech/doodle/ref_HiK-MG/high-k.htm