Definition
The layered gate structure comprising the gate dielectric and gate electrode materials, often including interfacial and work-function layers in advanced CMOS.
Application
Engineered to set electrostatics, equivalent oxide thickness, threshold voltage, leakage, and transistor performance.
Related concepts
Evidence and further reading
- Evidence from intel.comhttps://www.intel.com/pressroom/kits/advancedtech/doodle/ref_HiK-MG/high-k.htm
- Evidence from imec-int.comhttps://www.imec-int.com/en/articles/imec-demonstrates-world-s-first-vertically-stacked-gate-all-around-si-nanowire-cmos-transistors