Definition
A digital-design abstraction that describes data flow between hardware registers and the logical or arithmetic operations applied to that data, commonly expressed in a hardware description language.
Application
Used for front-end ASIC and FPGA design, simulation, lint or formal verification, and logic synthesis before lower-level gate and physical implementation.
Related search terms
Register transfer level; RTL design
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Related concepts
Evidence and further reading
- Evidence from synopsys.comhttps://www.synopsys.com/glossary/what-is-register-transfer-level-design.html
- Evidence from cadence.comhttps://www.cadence.com/en_US/home/company/newsroom/press-releases/pr/2023/cadence-unveils-joules-rtl-design-studio-delivering-breakthrough.html