Definition
A family of packaging technologies that uses high-density interconnect, multi-die integration, chiplets, wafer-level techniques or vertical stacking to extend system performance beyond conventional single-die packaging.
Application
Used to combine logic, memory and specialized dies in AI, HPC, mobile and other systems where bandwidth, power, form factor or heterogeneous integration are critical.
Related search terms
Advanced semiconductor packaging
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Related concepts
Evidence and further reading
- Evidence from semi.orghttps://www.semi.org/en/technology-trends/topic/heterogeneous-integration
- Evidence from ase.aseglobal.comhttps://ase.aseglobal.com/blog/technology/advanced-packaging-design-for-heterogeneous-integration/