Definition
TSMC's family of advanced packaging technologies that integrates multiple dies or components, such as logic chiplets and high-bandwidth memory, on a high-density interposer or redistribution structure, which is then assembled onto a package substrate.
Application
Used for AI and high-performance-computing systems that need extremely high die-to-die and memory bandwidth. CoWoS variants include silicon-interposer and redistribution-layer-based implementations.
Related search terms
Chip-on-Wafer-on-Substrate; TSMC CoWoS
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Related concepts
Evidence and further reading
- Evidence from 3dfabric.tsmc.comhttps://3dfabric.tsmc.com/english/dedicatedFoundry/technology/cowos.htm
- Evidence from 3dfabric.tsmc.comhttps://3dfabric.tsmc.com/