Definition
The center-to-center distance between adjacent bumps or copper pillars in a flip-chip or wafer-level interconnect array.
Application
Used as a key packaging-density metric because smaller pitch allows more die I/O connections in a given area, but it increases alignment, bridging, substrate-routing and assembly challenges.
Related search terms
Inter-bump pitch; bump spacing
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Related concepts
Evidence and further reading
- Evidence from amkor.comhttps://amkor.com/packaging/laminate/fccsp/
- Evidence from ir.amkor.comhttps://ir.amkor.com/news-releases/news-release-details/amkor-technology-and-texas-instruments-deliver-industrys-first