Definition
Design techniques that add or organize circuit structures so manufactured integrated circuits can be controlled, observed, tested and diagnosed more efficiently and with high fault coverage.
Application
Implemented with scan chains, test compression, test points, memory or logic BIST and related access logic to reduce production-test time and cost, improve fault coverage and support diagnosis during wafer and final test.
Related search terms
Design-for-testability; testability design
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Related concepts
Evidence and further reading
- Evidence from cadence.comhttps://www.cadence.com/en_US/home/tools/digital-design-and-signoff/test-automation/modus-dft-software.html
- Evidence from cadence.comhttps://www.cadence.com/en_US/home/resources/datasheets/genus-synthesis-solution-ds.html