Definition
The positional error between the intended edge of a patterned feature and the edge actually printed on the wafer, reflecting combined pattern-placement contributions such as overlay and critical-dimension variation.
Application
Used as an advanced-patterning accuracy metric and budget to control lithography, metrology and pattern-transfer variation so that neighboring features maintain the overlap and spacing required for functional devices.
Related search terms
Edge-placement error
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Related concepts
Evidence and further reading
- Evidence from ourbrand.asml.comhttps://ourbrand.asml.com/m/8ab959d4926657b/original/asml-2025-annual-report-strategic-report-section.pdf
- Evidence from imec-int.comhttps://www.imec-int.com/en/articles/four-decades-fab-metrology-and-inspection-pivotal-milestones-and-road-ahead