Definition
Electrical resistance of an on-chip conductive interconnect line, determined by conductor resistivity and line geometry such as length, width, and thickness.
Application
Used in BEOL RC-delay, voltage-drop, power, and scaling analysis; shrinking cross-sections and roughness can increase line resistance.
Related search terms
Interconnect resistance; wire resistance
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Related concepts
Evidence and further reading
- Evidence from semiengineering.comhttps://semiengineering.com/rc-delay-bottleneck-to-scaling/
- Evidence from semiengineering.comhttps://semiengineering.com/how-does-line-edge-roughness-ler-affect-semiconductor-performance-at-advanced-nodes/