Definition
A silicon-based intermediate substrate with interconnect wiring that links dies in a multi-die package.
Application
Used to connect logic chiplets and high-bandwidth memory in advanced packages; active versions can also provide chiplet-to-chiplet communication circuitry.
Related concepts
Evidence and further reading
- Evidence from 3dfabric.tsmc.comhttps://3dfabric.tsmc.com/english/dedicatedFoundry/technology/cowos.htm
- Evidence from leti-cea.frhttps://www.leti-cea.fr/cea-tech/leti/Documents/d%C3%A9monstrateurs/Flyer_3D-HPC_num.pdf