Definition
The wafer-fabrication stage in which the interconnect wiring stack is formed above completed device structures and contacts, including metal lines, vias and interlayer dielectrics.
Application
Used to create the signal and power-routing network that connects transistors into functional circuits, with performance strongly affected by line resistance, capacitance, dielectric materials and interconnect reliability.
Related search terms
Back-end-of-line
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Related concepts
Evidence and further reading
- Evidence from lamresearch.comhttps://www.lamresearch.com/technical-glossary/
- Evidence from imec-int.comhttps://www.imec-int.com/en/articles/backside-power-delivery-options-dtco-study